Press Releases
CriticalBlue Demonstrates First Coprocessor Synthesis Solution:
True Migration from Software to Hardware
Edinburgh, Scotland - February 10, 2004 - CriticalBlue, a start-up focused on delivering tools for accelerating software in embedded microprocessor applications, has announced the first public showing of its Cascade tool and methodology by means of two separate demonstrations at DATE 2004. The software demonstration will encapsulate the complete end user experience when using the tool and the hardware demonstration will showcase the CriticalBlue approach in the context of a real customer application within the Imaging domain.
The software demonstration begins with profiled embedded software on an ARM core. Cascade will be used to 1) identify software functions to offload, 2) specify end user constraints for the coprocessor synthesis process, and 3) generate a hardware coprocessor optimized to run those offloaded functions. The hardware demonstration uses a fully functional hardware system to emphasis how Cascade can speed up an embedded software application - along with the time required to implement it - at the same time as minimizing the design risks associated with alternative methods of creating hardware accelerators.
Dynamic market conditions and the costs of System on Chip (SoC) designs are prompting semiconductor vendors and system houses to seek solutions that accommodate the notion of embedded software as the golden source of any given product. Delivering an automated migration path from embedded software directly to hardware, Cascade is able to produce end user value and leverage existing development investments. CriticalBlue's coprocessor synthesis technology works from the object code of the main system processor and is architected to work with standard EDA tools which make up the embedded software, system level, and hardware implementation flows.
"Creating hardware accelerators is not a new concept but it is apparent that market pressures are forcing the move to definition of systems as executable embedded software, and this means that the tangible break in the flow that is known as partitioning is no longer tolerable in many applications," commented David Stewart, CEO, CriticalBlue. "Cascade is the first EDA tool which delivers a viable migration path from software to hardware. What we will be showing at DATE will give the user a sense of how easy it is to adopt our flow and will prove the real life benefits of Cascade's coprocessor synthesis technology."
Demonstrating how Cascade Increases Productivity
CriticalBlue's DATE 2004 demonstrations are based around an Imaging application. The hardware demonstration focuses on a comparison of the platform's performance with and without a CriticalBlue coprocessor - meeting the system level performance requirements and eliminating the need for a hard crafted custom hardware accelerator. The software demonstration focuses on how the user directs and drives the tool to meet the project's challenging goals of performance, silicon area and development schedule.
CriticalBlue's technology is built around the guiding principle of keeping the barriers to adoption low for end users. Cascade's ease of use is exhibited by single stepping the user through the analysis of key image processing tasks within a digital camera platform. The software demonstration shows how the application can be accelerated by synthesizing coprocessors in three simple steps:
- Step 1 involves setting the system constraints that both define the desired final system performance of the coprocessor and describe the environment in which it must operate.
- Step 2: the designer imports the profiling information and object code compiled on the main processor's development environment. The tool then analyzes the offloaded functions and synthesizes a number of coprocessor 'candidates' that are optimized to execute the offloaded software, based on the constraints set in Step 1. Additionally within Cascade, the designer is able to determine the most suitable software functions to be offloaded from the main processor onto one or more coprocessors.
- Step 3 Cascade provides an intuitive environment where 'candidate' coprocessor architectures can be thoroughly evaluated. The candidate's performance is measured against the constraints set in Step 1 using metrics that include the execution time of the coprocessor and the architecture's gate count. At this stage, a cycle accurate C model of the chosen candidate will be generated; and an RTL description of the coprocessor can be generated in either Verilog or VHDL. The C model can then be used within industry standard system level design environments to validate that the complete system operates as planned. Test harnesses and synthesis scripts are also automatically generated for the RTL description, which can then be passed to traditional simulation and/or synthesis tools in the EDA flow.
"Cascade delivers a significant reduction in end user project implementation times; enabling more flexible products and longer silicon lifetimes. Using the RTL description of the coprocessor generated by the tool, the hardware demonstration shows how effectively Cascade fits into standard design flows and how the coprocessor itself becomes a seamless component in the digital camera platform," commented David Stewart, CEO, CriticalBlue. "The acceleration of these key processing functions using a CriticalBlue coprocessor enabled live camera images to be processed at rates up to 15x faster than using the main processor alone."
Availability and Price
Cascade is scheduled to be released in late Q2 2004. Pricing for Cascade is quoted on a per project basis and is in the range of $100,000 to $200,000 for typical projects.
About CriticalBlue
CriticalBlue is focused on delivering tools for accelerating software in embedded microprocessor applications to key design houses and semiconductor vendors in the telecommunication, automotive and multimedia industries. The Cascade tool suite provides a broader range of implementation options within existing electronic design flows, as well as minimizing risk and development time. This is achieved by analyzing application software and automatically generating an appropriate coprocessor, designed to accelerate tasks written for a general-purpose microprocessor.
CriticalBlue is headquartered in The Scottish Microelectronics Centre, West Mains Road, Edinburgh EH9 3JF, United Kingdom. For more information, visit www.criticalblue.com.
For more information please contact:
David Stewart
CriticalBlue
+1 408 467 5091
Leslie Cumming
Skye Marketing Communications
+ 1 415 285 2352