Press Releases

CriticalBlue releases support for Texas Instruments’ TMS320C66x multicore DSPs within Prism
Prism extends its reach by enabling users to target and optimize software for DSPs

San Jose, Calif. — November 9th, 2011 — CriticalBlue, a provider of embedded multicore software analysis, exploration and verification tools with associated services, announced today immediate availability for Texas Instruments Incorporated’s (TI’s) TMS320C66x digital signal processor (DSP) generation based on the KeyStone multicore architecture within CriticalBlue’s Prism product. Software developers are now able to analyze their existing software applications and quickly assess the tangible benefits of migrating to TI’s C66x multicore DSPs.

This collaborative relationship demonstrates the deepening and broadening of CriticalBlue’s Prism capabilities with leading multicore vendors, as this is the first DSP platform to be officially launched. Prism operates as a plug-in within TI’s Code Composer Studio™ (CCStudio) integrated development environment (IDE) based on the EclipseTM open source software framework, and will help TI customers quantify the differentiation of the C66x DSP core architecture when running their own software applications on the TMS320C667x multicore DSP and future generations.

Prism is an award winning Eclipse-based embedded multicore programming system which allows software engineers to easily assess and realize the full potential of multicore processors without significant changes to their existing development flow. Prism analyzes the behavior of code running on hardware development boards, virtual machines or simulators. It allows engineers to take their existing sequential code, and before making any changes, explore and analyze opportunities for concurrency. Having identified the optimal parallelization strategies in this way, developers implement parallel structures, and use Prism again to verify performance efficiency and thread-safe operations.

In addition to partitioning software onto multicore hardware, the launch of this new Prism Platform Support Package (PSP) will be that users can quantify the benefit of software migration to C66x multicore DSPs. Developers can analyze data cache misses on a thread, function or source line level, resulting in an ability to see the impact of such cache misses and stalls on the overall concurrent schedule. This valuable feedback to the software programmer would otherwise be extremely difficult to visualize. Ultimately, Prism provides programmers with an estimate of the performance gain achievable by partitioning their program into multiple tasks and targeting one of the C66x multicore DSPs.

These analyses can be done on existing unmodified software applications running on TI’s instruction set simulator. Experienced multicore software programmers will benefit from Prism’s capabilities in the area of performance tuning and general multicore code optimization. A 30 day evaluation copy of the Prism Core PSP for C66x DSPs is available today from the CriticalBlue website.

Support Quotes

“When we announced a few months ago that TI’s C66x would be the first DSP supported within Prism, we received immediate enquiries on its availability, underlining TI’s position as a worldwide leader in DSPs.” said David Stewart, CEO, CriticalBlue. “I am delighted to report that we already have active evaluations and ongoing detailed discussions on how we can best apply Prism with our training and consultancy services to help software developers optimize their use of TI’s C66x multicore platforms.”

"During our internal testing it became clear that getting the benefits of CriticalBlue’s tool is as easy as taking existing software running today on a single processor, compiling and running in the standard TI simulator, capturing simulator traces, and importing into Prism,” said Frank Fruth, director of software for software engineering, multicore and media infrastructure, TI. “Prism can then be used to determine the best path to start implementing the application for TI multicore devices including identifying potential data dependencies only visible when parallelizing software execution on multiple processors. The power of the tools lies in their ability to allow rapid prototyping of various parallelization strategies prior to implementation of software changes helping to speed development and optimization of multicore software."

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