
Software teams resist parallelizing their applications because they can't risk potentially complex and uncertain development cycles without real assurance that they can achieve high quality code, on time, with predicted power and performance improvements. By working closely with multicore engineers, CriticalBlue developed Prism™ to take developers from 'what-if' to 'requirements met', streamlining sequential to parallel programming in five best practice steps
Characterize a serial or parallel application on real workloads. Identify program hotspots, call trees, and data dependencies which will shape achievable parallelism.
Before modifying any code, explore different parallel scenarios. What if this function ran in a separate thread? What if these dependencies were removed? Understand the benefits and select the best strategy.
Implement the chosen parallelization strategy. Use existing development tools without change.
Confirm that the implementation safely achieved the desired results. Functions properly threaded and dependencies removed? Any potential data races? Synchronization bottlenecks?
Analyze opportunities for further parallelization by reapplying the previous steps.
Prism is engineered to work with different processors, programming models, operating systems, development boards and system environments. Prism capabilities are enabled through platform support packages (PSPs).
Instruction PSPs are designed to support general instruction set architectures and are intended for quick application parallelization. ARM, Freescale Power, Intel x86-32, MIPS32 and Renesas SH4 processors are supported with more on the way.
Core PSPs enhance Prism by providing additional accuracy through the introduction of hardware awareness into the core modeling. Hardware awareness extensions might include data cache miss impact analysis, hardware threading impact analysis, multicore tracing support, and multicore trace extraction.
System PSPs further enhance Prism for production SoCs and boards. Platform analysis extensions might include configurable full system modeling, power analysis, custom scheduling, specialized parallel programming models, and operating system and board level integration. The Toshiba Venezia PSP is an example which supports Venezia’s proprietary threading API and cache coherence validation.
Prism pricing starts at $200/month for an Instruction PSP and a minimum one year node locked license. Additional open source or commercial boards, virtual machines, or simulators may be required. Core and System PSPs are developed in collaboration with chip and system providers and are priced individually but are typically $400/month and $600/month respectively.
Prism is available directly from CriticalBlue or through platform providers for certain PSPs.
PC with at least 1GB memory. Windows or Linux operating system.