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Accelerating Embedded Software

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"With the increase in silicon development costs and the shortening of market windows, it is vital for us to be able to accelerate the development of platforms, which not only have state of the art performance but also have built-in flexibility….We have recently tested the technology of CriticalBlue and the initial results look very promising in terms of the performance/cost ratio and the development time we would have expected using traditional methods."

Luigi Mantellassi, Imaging Division Processors R&D Director, STMicroelectronics


July 2008

Getting started with multicore programming

What makes parallelizing C-code so hard? Compared to single core systems, coherent shared memory systems are much more challenging to program correctly. Nevertheless, with an incremental development and test approach to parallelism and a willingness to apply lessons learned by previous parallel programmers, successful systems are being deployed today using existing C/C++ environments. Read full article

June 2008

Attack the parallel worlds of parallel programming

It's the tool industry's obligation to address the issues associated with parallel programming. This observation led David Stewart to propose the setting up of a Multicore Programming Practices (MPP) Working Group under the auspices of the Multicore Association and, when the Association approved the proposal, he agreed to co-chair the group with Max Domeika from Intel. The idea behind this group is to provide hardworking engineers with some practical guidelines based on the current practices in use by other engineers who have learnt how to write parallel software the hard way. Read full article

May 2008

Designers Draft Multicore Programming Guide

The Multicore Association is kicking off an effort to define best programming practices for embedded multicore processors. The group hopes within a year to define and create a guide to handling the thorniest problems in the growing arena of parallel software. "I see this as the 'Read Me' document for anyone doing multicore programming," said David Stewart, co-chair of the new working group and chief executive of CriticalBlue (San Jose), a provider of software design tools. Read full article

'Best practices' emerge for multicore programming

Aiming to define a set of "best practices" for C/C++ programming for multicore platforms, the Multicore Association has established a Multicore Programming Practices (MPP) working group. It will produce guidelines and definitions to help ease the challenge of moving to parallel programming. Read full article

Association takes aim at difficulty of multicore programming

The Multicore Association today announced the formation of a working group focused on easing the challenges software developers face when using C/C++ to program for multicore platforms. The Multicore Programming Practices (MPP) group will initially work to develop a guide that captures current industry best practices with an eye toward helping developers avoid common pitfalls. Read full article

Software Rules The Day In Multicore SoC Design

With the number of on-chip processors set to explode, software-development issues loom for design teams. Yet D&V methodologies may evolve to avert any stumbling over parallelism. Read full article

Programming Multicore Platforms: What’s Really Going On?

The reusable hardware platform, bristling with a range of processor architectures, is becoming commonplace. But even as processor vendors tout their latest multicore offerings, the effective programming of these complex devices remains an open question. Read full article

May 2007

Coprocessor synthesis steps up to multicore

Tapping into the explosive growth of multicore devices, CriticalBlue this week will announce plans to add a multicore development capability to its Cascade coprocessor synthesis suite. More immediately, CriticalBlue is rolling out Cascade 2.4, a release that takes the first steps toward that multicore capability.

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CriticalBlue details single-threaded multicore methodology

To allow multicore platform design while eliminating application redevelopment for multiple threads, San Jose, Calif.–based embedded microprocessor accelerated software supplier CriticalBlue said today it has added multicore development capability to its Cascade coprocessor synthesis solution.

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April 2007

Multicore software problems edging toward center stage

From meetings and conversations on the floor at the Embedded Systems Conference, it is becoming clear that the engineering issue of the year for embedded designers—or at least for the engineering press and the marketing community—is going to be multicore architectures. And the best candidate for the center of this discussion is going to be the problem of programming multicore devices.

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Adapting Hardware to Software: Productive Programming in a Multi-core Environment

Automated processor synthesis lowers the costs and time of application-specific coprocessor development enabling a more software-centric approach to product development. Once software functionality is established, critical software sections are off-loaded onto application-optimized co-processors. Each coprocessor is optimized to meet performance, power and area metrics, and is fully programmable, so features may be added or improved after market. The simplicity and speed of coprocessor synthesis enables broad design space exploration, and the same software description may be retargeted to meet different product price and performance profiles. by Skip Hovsmith

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Software-Centric Co-Design

For most system-on-chip (SOC) projects, software dominates development costs and market risk. Pressure to manage increased complexity within shorter design cycles forces designers to evolve existing processor-based platforms with just enough hardware to meet new software requirements. When these requirements outstrip the processor cycles available in existing systems, the designer must choose between adding or upgrading the processor IP or undertaking time-consuming RTL development. Rapid coprocessor synthesis provides designers with a better solution.

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February 2007

How to Design Cost-Optimized Configurable Embedded Systems with ARM926EJ™

Embedded System Designers have to make design tradeoffs between using cost-optimized systems and differentiated processors. Traditional choices for embedded system development include using off the shelf products like microcontrollers and ASSPs, or customized solutions such as FPGAs and ASICs. This webinar presents engineers with a new alternative for developing optimized embedded systems that are customizable in both hardware and software yet inexpensive to develop.

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December 2006

Reducing power demands with specialized coprocessors

Consumer products require specialized multi-core architectures to meet power constraints. Market windows and risk favor software implementations. by Skip Hovsmith

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August 2006

Multi-Coprocessing Can Complement Multi-Processing Platfom

Multi-coprocessor architectures provides a way for microprocessor experts and novices to predictably develop derivative designs. by Richard Taylor

Many software-development considerations affect multiprocessor system design. An alternative approach-namely application-optimized programmable coprocessing-promises to meet or beat the performance of multiprocessor architectures. At the same time, it maintains a standard, single-processor software-development methodology. Application-optimized programmable coprocessing enhances system performance by adding both instruction- level parallelism and parallel hardware resources that speed the execution of compute-intensive software. An application-optimized coprocessor is easily synthesizable. It requires no microprocessor design expertise. In addition, it obviates the software redevelopment and hardware implementation effort necessitated by the deployment of additional ...

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July 2006

Alternative computing solutions, from single cores to arrays of 'things'

There are many ways of performing computations, including single CPU or DSP processors (chips or cores), multiple processors, arrays of "things", and "great big piles of gates."

Editor's Note: Way back in the mists of time (in the early days of 2006), I penned an article for on EE Times discussing the various computing options available to designers, from single processors and multiple processors, via co-processors and hardware accelerators, through arrays of "things", all the way down to "great big piles of gates." Since then, I've been maintaining...

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Startup rolls enhanced coprocessor synthesis tool

SAN FRANCISCO — EDA startup CriticalBlue has released the latest version of its Cascade coprocessor synthesis tool, claimed to feature a 50 percent reduction in microcode size and 30 percent reduction in logic area, the company said Friday (July 14).

According to CriticalBlue (San Jose, Calif.), Cascade 2.1 includes significant new product features that have been developed to meet customer demand, delivering smaller silicon footprints for resulting coprocessors and further integration with existing customer flows and methods...

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June 2006

CriticalBlue closes $3.7 million second-round funding

SANTA CRUZ, Calif. — CriticalBlue Ltd., a provider of tools for coprocessor synthesis, has closed its second round of funding with $3.7 million. The funds will be used to expand global sales and support for CriticalBlue's Cascade product, according to the company.

CriticalBlue (Edinburgh, Scotland) introduced Cascade in May 2004. Cascade takes applications software and synthesizes a hardware coprocessor that accelerates software tasks chosen by the user. It thus offers a middle ground between building custom hardware and putting functionality...

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March 2006

What Do You Do When The CPU Doesn't Deliver?

The exponentially increasing software functionality of system-on-chip (SoC) designs is challenging the conventional general purpose (GP) processing approach. Meeting this challenge is critical to SoC competitiveness because it determines performance, power consumption, re-usability...

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Xilinx launches ESL initiative

LONDON - Field programmable gate array vendor Xilinx Inc. has teamed up with a number of small design and subsystem companies, many of them European, to form a system-level design initiative that it hopes will set standards for high-level...

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February 2006

Reconfigurable cores boost processor power

The first commercial microprocessor, Intel's 4004, debuted in 1971 with 2,300 transistors, a 108-kHz system clock and a 4-bit bus. Since then, chip architects have increased the computational performance and throughput of the 4004's successors by increasing the transistor count, the data bus width or the clock speed, and by introducing such execution-related tweaks...

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January 2006

Processing options: Choose the right mix of processing technologies for embedded-system designs.

The number of options for choosing the best processor for embedded-system designs continues to increase. In addition to microprocessors, microcontrollers, and DSPs (digital-signal processors), several unified microprocessors from companies such as Analog Devices, Infineon, Microchip, and Freescale have also emerged...

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November 2005

Power consumption is main concern for chip developers

Power consumption, not performance, is now the overriding concern for system-on-chip developers, according to the chief executive of Scottish EDA firm CriticalBlue.

David Stewart said the increased focus on power budgets that comes with 90nm semiconductor process technology is pushing designers to use distributed processing...

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October 2005

CriticalBlue The Latest Entrant In IBM's Power.org Community

CriticalBlue, a vendor of tools that accelerate software in embedded microprocessor applications, has joined IBM's Power.org community and will support the IBM Power microprocessor with its Cascade coprocessor synthesis tool. Coprocessor synthesis boosts embedded-system processing performance by creating a loosely coupled programmable coprocessor that accelerates the execution of compiled binary executable software code offloaded from the main processor in the system...

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September 2005

CriticalBlue supporting Power architecture with Cascade

SAN FRANCISCO — Embedded systems design tool startup CriticalBlue has added support for IBM Corp.'s Power architecture to its Cascade co-processor synthesis tool.

According to CriticalBlue (San Joe, Calif.), co-processor synthesis boosts embedded systems processing performance by creating a loosely coupled programmable co-processor to accelerate the execution of compiled binary executable software code offloaded from the main processor in the system...

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Architectural-design considerations for implementing hardware acceleration

Exploiting hybrid software/hardware parallelism in algorithm-hardware accelerations can yield significant performance gains over a function-replacement approach.

Across a range of embedded-system applications, the combination of data-processing and system-throughput requirements is increasing to the point at which implementing algorithms purely in software on a single high-powered CPU is exposing two challenges. First, system power and cost are forced upward. Besides the obvious battery-life issues that exist for mobile platforms, rising power dissipation increases the requirement for heat sinks and supplemental cooling. Second is the issue of implementing value-added functions to a system when handling the baseline system functions fully occupies the CPU's processing capacity—especially when a designer cannot implement the new functions without including additional components.

What options are available?...

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Power.org adds eight members

SAN FRANCISCO — Power.org, an open community developing standards and applications around IBM Corp.'s Power Architecture, announced Monday (Sept. 26) that eight new members have joined the organization, bring total membership to more than 30 companies.

In a statement issued Monday from a members’ conference in Shanghai, China, Power.org said that new membership and product development by member companies has exceeded first-year expectations...

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July 2005

EDA Roundup

3D PLANAR ELECTROMAGNETIC MODELING AND ANALYSIS now comes in a 64-bit version with Agilent EEsof's latest edition of Momentum. With this version, users can see significantly improved accuracy, capacity, and speed for design and verification of passive components and interconnects in RFIC, MMIC...

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June 2005

DESIGN TOOLS: DAC drills down to the system level

San Francisco — The emerging electronic-system-level (ESL) design market will be a focus of attention at next week's Design Automation Conference, as vendors roll out solutions for leakage-power analysis, transaction-level debugging, cost estimation, coprocessor synthesis and multiple-clock-domain synthesis.

ChipVision Design Systems is claiming an industry first with an ESL power optimizer that includes leakage power. Summit Design Inc. is offering a transaction-level-modeling (TLM) viewer that works with SystemC simulators...

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May 2005

You Don't Have To Be A Processor Designer To Boost SoC Performance

Why deploy a coprocessor to boost system-on-a-chip (SoC) performance?

The short answer is that it's a better solution than adding a full-blown standard or custom processor. However, before we launch into that discussion, we need to sort out some confusion caused by the sloppy application of the term "coprocessor"...

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April 2005

Cutting a fast path to semiconductors

With special synthesis and processing, algorithms turn into silicon-but keep an eye on hardware...

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March 2005

Embedded software ripe for EDA pioneers

I enjoyed Richard Goering's Feb. 7 Art of Design column, which pointed out that there is much more to building end products than just custom-IC design ("Is EDA's world too provincial?" page 54). I couldn't agree more...

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An ESL State of Mind

Can you believe it? The second quarter of 2005 is already at hand. Where did the first quarter go? More importantly, was technical progress made in its passing? Hopefully, if the number of conferences which convene worldwide in the first quarter of each calendar year is any indication, the answer to that question is: Yes. Technical progress has been made – even over the course of these past 90 days – and you, yourself, probably contributed to that progress...

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February 2005

Speed SoC Software with Coprocessor Synthesis

While obeying SoC's power constraints, this coprocessor-synthesis methodology significantly speeds the execution of ever-increasing-volume embedded software...

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Turning software into hardware

I'm not quite sure what's happening, but 2005 seems set to be a bumper year for incredibly cool ideas. For example, I was recently chatting with the folks from CriticalBlue about their Cascade product, which synthesizes hardware from embedded software...

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EDA Alert: 6. News: Embedded-Software Accelerator Validated In RTL Flow

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January 2005

CriticalBlue integrates with Synopsys

EDA start-up CriticalBlue said it has completed a project that saw its embedded processor development tools integrated with Synopsys' hardware development flow...

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December 2004

EDA Confidential 2005 Emerging Trends: EDA and Embedded

It started at the Embedded Systems Conference this past spring in San Francisco, when I heard Wind River's Jerry Fiddler give the keynote address. In his talk, Fiddler made frequent, broad references to the EDA industry and it occurred to me that it might be interesting to explore the growing interface between the embedded software world (ESW) and the world of electronic design automation (EDA)...

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November 2004

EDN hands-on project: Accelerate your performance

This two part series explores the increasing options for hardware acceleration and how designers without hardware backgrounds can benefit from evolving development tools.

Read full article – part 1 http://www.edn.com/article/CA476908.html

Read full article – part 2 http://www.edn.com/article/CA484490.html

September 2004

Embedded software and FPGAs: A partnership ready for prime time By David Stewart

FPGAs, given their ease of programming, should be a natural hardware platform for embedded-software developers. However, FPGAs have remained largely in the domain of hardware engineering...

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June 2004

EDA on the rebound

DAC shows the eda industry returning to health.

Most executives agree there is one simple way to assess the eda industry's general health: through attendance on day two of the Design Automation Conference (DAC). Day one of DAC is free, so it's always busy. Day two, however, is a capital expenditure call...Read full article


EDA trends suggest turning point for chip design

San Diego - Marking what may be a turning point for chip design, EDA vendors will come to the 41st Design Automation Conference here on June 7-11 with new technology in three areas: electronic-system-level (ESL) design, IC implementation and functional verification. Startups and small vendors are behind many of the announcements...

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May 2004

CriticalBlue Releases Coprocessor Synthesis Tool

SANTA CRUZ, Calif. — Offering a way to accelerate software in synthesized coprocessors, startup CriticalBlue this week (May 19) is announcing the commercial release of its Cascade tool suite. The company is also claiming to have verified Cascade's use and accuracy within a Synplicity tool flow...

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March 2004

FastTake on Cascade Tool Demonstration

Scotland-based CriticalBlue demonstrated its co-processor synthesis solution for the first time at DATE 2004 last month. The most intriguing part of the Cascade tool suite is how easly it can accelerate a processor by simply extracting object code and automating some processor functions in hardware...

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Feburary 2004

The Future of Wireless is on Display at Wireless Systems 2004

The Wireless Systems 2004 Conference and Exhibition is right around the corner. From March 8 through 10. This year, the show will testify to the robust nature of the wireless industry...

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Accelerating software using co-processor synthesis

Coprocessor synthesis widens the design space available to engineers, creating a true hybrid between hardware and software and accelerating performance...

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CriticalBlue accelerates embedded software

CriticalBlue, an EDA start-up based in Scotland, will be in Paris next week to demonstrate its Cascade tool in public for the first time at DATE 2004. The firm's technology accelerates...

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Synthesizing Co-Processors - The 'New Alchemy' of Embedded Design

Software plays a major role in the development of all kinds of application-adaptable ICs (AAICs), from EDA design tools to operational code that makes some types of devices configurable...

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January 2004

Lors de DATE, des experts se pencheront sur les problèmes liés à la conception

MANHASSET, New York - Les interactions entre les concepteurs de logiciels embarqués et les concepteurs de matériel iront bon train lors de la conférence Design...

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DATE panels to address design issues

MANHASSET, NY — The interplay between embedded software and hardware designers will get a fresh airing at next month's Design Automation and Test in Europe conference...

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October 2003

EE Times: Co-processor synthesis startup wins first-round funding

SANTA CRUZ, Calif. — CriticalBlue, a Scottish EDA startup preparing tools for accelerating software in embedded microprocessor applications, has won around $2 million in its first round...

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September 2003

Electronics Weekly: CriticalBlue Collects $2m funding

Scottish design tool developer Critical Blue has gathered $2m in first round funding and appointed Peter Denyer, founder of CMOS image sensing firm Vision, to its board of directors...

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August 2003

ESL must keep software in mind

For more years than I care to count, I've heard that the pressures of complexity and time-to-market will force designers to move upward in abstraction, and that RTL to...

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EEDesign: ESL must keep software in mind

For more years than I care to count, I've heard that the pressures of complexity and time-to-market will force designers to move upward in abstraction, and that RTL to electronic...

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FROM EDN EUROPE: Creating acceleration hardware to match software demands

Many applications are characterised by key functions that may repeat many times as inner loops of their application programming; the performance of the system in executing these...

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July 2003

EPN DAC Report: highlighting trends in EDA

The approach followed by Criticalblue is not restrained to a set of architectures and can be deployed to accelerate any embedded microprocessor application. The Cascade Tool Suite...

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ROM EDN EUROPE: Creating acceleration hardware to match software demands By Graham Prophet --EDN Europe

Many applications are characterised by key functions that may repeat many times as inner loops of their application programming; the performance of the system in executing these...

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June 2003

EDN Commentary: EDA Is Alive But Is It Well? Gabe Moretti, EDA editor, EDN magazine

Everyone involved with this year’s DAC seems satisfied. The attendees found the program interesting, the organizers found that attendance increased by more than 25% over last year...

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EDN Access

Everyone involved with this year’s DAC seems satisfied. The attendees found the program interesting, the organizers found that attendance increased by more than 25% over last year...

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Electronic Design UPDATE: David Maliniak, Staff, John Novellino

CHECK IT OUT: Visit our recently redesigned Web site, www.elecdesign.com, where the power of Electronic Design is a mouse click away! Read our Web exclusives, discover Featured...

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"Toned-Down" DAC Holds Few Surprises - TechOnLine

At the top of my short list of really interesting new products was CriticalBlue's Cascade Tool Suite, originally announced in mid-May of this year. Cascade addresses a common...

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Commentary: EDA Is Alive But Is It Well?

Everyone involved with this year’s DAC seems satisfied. The attendees found the program interesting, the organizers found that attendance increased by more than 25% over last year, and the exhibitors found signs...

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May 2003

Scottish firm reveals tool to go native in processor - Electronics Weekly

Scottish firm Critical Blue has unveiled its long awaited product, a tool for creating a co-processor to run the native software of the main system processor...

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EDA startup promises 'coprocessor synthesis', EE Times

Santa Cruz, Calif. - Proposing a radical new approach to chip design, EDA startup CriticalBlue (Edinburgh, Scotland) vows that its upcoming Cascade tool set will provide what...

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Scottish system EDA start-up signs up STMicro, Semiconductor Business News

EDINBURGH, Scotland --- A start-up company that was spun out of Edinburgh University and previously known as Adaptive Programmable Silicon Ltd. has changed its name to...

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Scottish firm's co-processor runs native software

Scottish firm Critical Blue has unveiled its long awaited product, a tool for creating a co-processor to run the native software of the main system processor...

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