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Prism Platform Support Packages

Prism supports trace capture from a wide range of target platforms with multiple levels of specialized support available for each.

Users select the Platform Support Packages (PSPs) which best meet their development needs.

Target Platforms

Prism is designed to be applicable across a wide range of target platforms and new PSPs are being continually developed. A target platform is defined as the combination of processor and operating system (if any) the application to be analyzed by Prism is running on. Once the correct PSP for the target platform is installed you have all the tools required to capture the behaviour of your applicaiton.

The table below lists the hardware vendors whsoe devices are currently support by Prism. Click the relevent row for more details of available PSPs for that vendor.

Hardware VendorSupported ProcessorsSupported OS
ARMARMv5, ARMv6 & ARMv7 devices (ARM9™, ARM11™, Cortex™-A)Android, Linux
CaviumcnMIPS64 devices (esp. Octeon™)Linux
FreescaleMost Power Architecture devices (QorIQ™, 8xxx, PowerQUICC®, POWER e200),
i.MX 6 ARM Architecture Devices,
StarCore DSP
Linux, Bare Metal
IntelMost x86 compatible processorsLinux
MIPSMost MIPS32® based devices (24K®, 34k®, 1004K®)Android, Linux
NetLogicNetLogic XLR™, XLS™ and XLP™ devicesLinux
RenesasSH-4 (400, 500, 200), V850None, Bare Metal
Texas InstrumentsTI C66x Simulators in Code Composer Studio v5None, Bare Metal
ToshibaVenezia (MeP + IVC2)V-Kernel

PSP Levels

In addition to selecting the target platform there are 3 levels of Platform Support Package; Instruction, Core and System, each of which is available for a range of target platforms. Each level adds additional features which increasingly specialize the PSP to a particular hardware platform allowing the user to ask more detailed questions about how their software will perform.

Instruction PSP

Instruction PSPs provide features to support the analysis of software with support for the underlying hardware limited to trace capture only. This level of PSP is targeted at software developers who are mainly concerned with how to partition their code as efficiently and correctly as possible and are not optimizing for a particular platform.

Core PSP

Core PSPs include all the features of Instruction PSPs but include additional facilities for the user to understand how well their code will execute on a specific processor family. These features allow more accurate Schedules to be generated for What-If analysis and for the user to identify performance problems due to the way their code interacts with the architecture of the processor. Typical hardware awareness features which may be found in Core PSPs are data cache miss impact analysis and hardware threading impact analysis.

This level of PSP is ideal for developers who have a target processor family defined and wish to optimize for the variety of architectural configurations (core number, cache size and configuration) presented by individual devices within that family. As developers begin to investigate the architectural merits of different solutions, a Core PSP becomes a natural evolution from an Instruction PSP.

System PSP

System PSPs are the most specialized type of PSP and contain all of the features of the Core PSP which are extended with more in-depth modeling of the underlying hardware including memory organization, hardware peripherals and buses. Prism may also import or export data to other analysis tools and simulators for the target platform

At this level the feature sets of PSPs can vary substantially and are heavily customized for the target. System PSPs are targeted at developers of complex multicore platforms where maximum software performance on a specific platform is vital.